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Espressif Systems /ESP32-C6 /SPI0 /SPI_MEM_MISC

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Interpret as SPI_MEM_MISC

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SPI_MEM_FSUB_PIN)SPI_MEM_FSUB_PIN 0 (SPI_MEM_SSUB_PIN)SPI_MEM_SSUB_PIN 0 (SPI_MEM_CK_IDLE_EDGE)SPI_MEM_CK_IDLE_EDGE 0 (SPI_MEM_CS_KEEP_ACTIVE)SPI_MEM_CS_KEEP_ACTIVE

Description

SPI0 misc register

Fields

SPI_MEM_FSUB_PIN

For SPI0, flash is connected to SUBPINs.
SPI_MEM_SSUB_PIN

For SPI0, sram is connected to SUBPINs.
SPI_MEM_CK_IDLE_EDGE

1: SPI_CLK line is high when idle 0: spi clk line is low when idle
SPI_MEM_CS_KEEP_ACTIVE

SPI_CS line keep low when the bit is set.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data